Reverse genlock for synchronous tiled display walls with smart internet displays
Related to the Predictably Reliable Real-time Transport (PRRT) project
Published in 2012 IEEE Second International Conference on Consumer Electronics-Berlin (ICCE-Berlin), 2012
Abstract:
When it comes to creating a very large combined screen comprised of multiple individual displays, a so-called tiled display wall, dedicated graphics and synchronization hardware is commonly used for two reasons: firstly, without compromising display resolution neither spatially nor in the time domain, each display needs to be driven by one discrete frame buffer at the full native display resolution. Secondly, synchronization of the individual displays to a common clock is required for smooth and undistorted reproduction of motion spanning multiple displays. One example for synchronization of multiple frame buffers is digital television broadcast. Herein, audio-visual bitstreams are generated including clock information in order to enable receivers to align playback frequency and phase accordingly, which is termed genlock. In this paper we present an architecture for IP-based reverse genlock, whereas a display clock signal is used both for inter-display synchronization as well as for generator synchronization. The accuracy of the synchronization enables multi-HD active stereoscopy at 120 Hz across many solely IP-interconnected displays.