Related to the Energy-, Latency- And Resilience-aware Networking (e.LARN) project
Published in PPoPP '18: 23nd ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2018
Interaction with physical objects often imposes latency requirements to multi-core embedded systems. One consequence is the need for synchronisation algorithms that provide predictable latency, in addition to high throughput. We present a synchronisation algorithm that needs at most 7 atomic memory operations per asynchronous critical section. The performance is competitive, at least, to locks.